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Apple Inc.
München
Design Verification Engineer for Cellular SoC (m/f/d) Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Hard-working people and inspiring, innovative technolo
Stellenquelle: Apple Inc.Scadea Solutions Inc
München
Scadea Solutions is a global talent acquisition and executive search company. We work exclusively with some of the most reputed and admired clients across various sectors and geographies. This is a very urgent role.Job DescriptionRole: PHYSICAL DESIGN EngineerWork Location -San Diego , CADuration: 6+ MonthsExperience: 8-10YrsStart Date- ImmediateJo
Stellenquelle: Scadea Solutions IncSystem Canada
München
SCT resources have a broad range of skills in different technologies. The large skill-set has been made possible by a conscious focus on strengthening our skills base. Every person selected for our team brings something new, something that adds to our offerings. We learn continuously, both on the job and through formal training programs.Job Descrip
Stellenquelle: System CanadaApple Inc.
München
SoC Engineering Program Manager (M, F, D) Do you have a passion for new technology ? Are you a highly motivated, organized person with a curiosity about program management? Be at the center of the action on new silicon product development for Apple's groundbreaking SoC's! Apple is seeking an Engineering Program Manager to join the SoC organization.
Stellenquelle: Apple Inc.Project A Services GmbH & Co. KG
München
About the Job We’re looking for an experienced Senior Mechanical Design Engineer (m/f/d) to join one of our portfolio companies and provide expertise to the technical team in the creation of hardware for autonomous unmanned ground vehicles and sensors. This role is suitable for a mechanical or electrical engineering generalist with the potential to
Stellenquelle: Project A Services GmbH & Co. KGTDK - Micronas GmbH
München-Haar
The future is our focus! TDK-Micronas' intelligent sensors and embedded motor controllers for automotive and industrial electronics continue to set new standards worldwide. Our home is Freiburg, rooted in the Black Forest in Germany, where a dynamic team of around 1,000 employees is waiting for you. Our core values of vision, courage and trust unit
Stellenquelle: TDK - Micronas GmbHApple Inc.
München
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a results-oriented and highly committed Design Verification Engineer. As a member of our multifaceted group, you will have the unique and exciting op
Stellenquelle: Apple Inc.microTECH Global Limited
München
Job Title: Principal Digital Verification EngineerJob Type: PermanentLocation: Munich, GermanyStart: ASAPOur client-We are working with a “solution SoC” company with rich experience in different markets leading innovations with customers around the world.In the fields of “automotive”, “data centre & networking”, and “smart devices”, functionality a
Stellenquelle: microTECH Global LimitedMünchen
Imagine what you could do here. At Apple, new ideas have a way of becoming great products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices — we continue to strengthen our commitment to leave the world better than we found it. By now the industry is accustomed to Apple taping out the SoCs for our various products at a rigorous pace. In order to achieve this, our world-class design processes are driven by our top-notch Physical Design engineers. Are you a classic partition PnR engineer recognised in the industry for the knowledge in standards and practices in Physical Design? Do you have strong track record with recent successful tape-outs in deep sub-micron technology? As SoC Digital Physical Design Engineer, you will take part in the large scale SoC physical design cycle from netlist to tape-out, including full flow of back-end implementation and verification always meeting schedule and design goals. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products?Join Us! Key Qualifications We will be counting on your expertise and years of hands on experience with one of the Place & Route ('PnR') tools available today (Synopsys / Cadence), and having understanding of their capabilities and underlying algorithms You are familiar with hierarchical design approach, top-down design, and timing and physical convergence You are demonstrating in-depth understanding of static-timing analysis, extensive know-how in clock/power distribution and analysis, as well as RC extraction and correlation You have experience with SoC practices such as multiple voltage and clock domains, integration of mixed-signal IPs and I/O integration You can do scripting and programming using several of the following: Perl, TCL and Make We expect experience with large SoC designs (>20M gates) with frequencies in excess of 1GHZ and beyond If you also have working knowledge in Verilog, that is a huge plus for us Your communication skills are excellent, and like the rest of us here at Apple you love working in open and multi-cultural environment. Description - As a member of our Physical Design team in this highly transparent role, you will directly own implementation of design partition(s) (netlist to delivery of our final GDS) for a highly complex SoC using brand-new process technology- You are going to own block level PnR, floor-planning, clock and power distribution- You will get involved with static timing closure with commercial tools- You will do power and noise analysis (EM / IR-Drop / Xtalk) as well as layout verification (DRC / LVS)- You will be developing and validating dedication low power clock network guidelines- With phenomenal focus you will resolve design and flow issues related to physical design, and identify potential solutions whilst driving execution- You know what documentation should look like, and will help with guidelines and specs Education & Experience You hold a MSEE or equivalent strong experience. #J-18808-Ljbffr
SOC Physical Design Engineer (M, F, D) jobs in München
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